Win Chaivipas
Royal Institute of Technology, Sweden
Magnus Danestig
Acreo AB, Sweden
Mohammed Ismail
Royal Institute of Technology, Sweden \ Spirea AB, Sweden
Henrik Johansson
Acreo AB, Sweden
Laurent Billonnet
IRCOM, UMR, France
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Published in: GigaHertz 2003. Proceedings from the Seventh Symposium
Linköping Electronic Conference Proceedings 8:29, p.
Published: 2003-11-06
ISBN:
ISSN: 1650-3686 (print), 1650-3740 (online)
A thorough study of a master-slave tuning of an active RF filter is presented. The control technique is based on the Voltage-Controlled Filter based Phase Locked-Loop (VCF-PLL) approach. A phase domain simulation model was developed to model the RF filter and it’s control circuitry; to enable fast; and relatively accurate simulation of the phase locked loop. A linear model of the complete VCF-PLL was developed for the purpose of manual analysis; and to get a better understanding of the relationship between the VCF-PLL loop-gain and loop settling accuracy. With the aid of the phase domain simulation model a silicon implementation of the VCF-PLL in 0.18 um CMOS was made. Finally; the paper ends with the conclusion and analysis of the PLL tuning error.
