A. Kerlain
Thales Research and Technology, Sweden
E. Morvan
Thales Research and Technology, Sweden
C. Dua
Thales Research and Technology, Sweden
N. Caillas
Thales Research and Technology, Sweden
C. Brylinski
Thales Research and Technology, Sweden
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Published in: GigaHertz 2003. Proceedings from the Seventh Symposium
Linköping Electronic Conference Proceedings 77:2, p.
Published: 2003-11-06
ISBN:
ISSN: 1650-3686 (print), 1650-3740 (online)
Several passivation schemes on 4H-SiC MESFETs have been studied. Two main configurations are compared. MESFET structures with thin passivation layer or no passivation layer (Configuration 1) exhibit high breakdown voltage but also current instability after high voltage Vds stress. Thick SiO2 passivation covering the gate (Configuration 2) improves the current stability but yields lower breakdown voltage and higher gate leakage current. Surface trapping effects are considered as the main cause of the observed phenomena.
